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◯2018.02. ISSCC
“A 2.1μm 33Mpixel CMOS Imager with Multi-Functional 3-Stage Pipeline ADC for 480fps High Speed Mode and 120fps Low-Noise Mode”

◯2017.12. Trans. ED
“A 1.1- μm 33-Mpixel 240-fps 3-D-Stacked CMOS Image Sensor With Three-Stage Cyclic-Cyclic-SAR Analog-to-Digital Converters”

◯2017.02. ISSCC
“A 0.44erms Read-Noise 32fps 0.5Mpixel High-Sensitivity RG-Less-Pixel CMOS Image Sensor Using Bootstrapping Reset”

◯2016.02. ISSCC
“A 1.1μm 33Mpixel 240fps 3D-Stacked CMOS Image Sensor with 3-Stage Cyclic-Based Analog-to-Digital Converters”

◯2014.02. ISSCC
“A 413×240-Pixel Sub-Centimeter Resolution Time-of-Flight CMOS Image Sensor with In-Pixel Background Canceling Using Lateral-Electric-Field Charge Modulators”

◯2012.12. Trans. ED The 2013 Walter Kosonocky Award
“A 33-Megapixel 120-Frames-Per-Second 2.5-Watt CMOS Image Sensor With Column-Parallel Two-Stage Cyclic Analog-to-Digital Converters”

◯2012.12. Trans. ED
“A Low-Noise High-Dynamic-Range 17-b 1.3-Megapixel 30-fps CMOS Image Sensor With Column-Parallel Two-Stage Folding-Integration/Cyclic ADC”

◯2012.02. ISSCC
“A 33Mpixel 120fps CMOS Image Sensor Using 12b Column-Parallel Pipelined Cyclic ADCs ”

◯2012.01. Journal. SSC
“A Low-Noise High Intrascene Dynamic Range CMOS Image Sensor With a 13 to 19b Variable-Resolution Column-Parallel Folding-Integration/Cyclic ADC”

◯2011.06. IISW
“A High Speed Low-Noise CIS with 12b 2-stage Pipeline Cyclic ADCs”

◯2011.06. IISW
“A 33Mpixel, 120fps CMOS Image Sensor for UDTV Application with Two-stage Column-Parallel Cyclic ADCs”

◯2011.02. ISSCC
“An 80μVrms-Temporal-Noise 82dB-Dynamic-Range CMOS Image Sensor with a 13-to-19b Variable-Resolution Column-Parallel Folding-Integration/Cyclic ADC”

◯2010.07. Trans. ED Vol.57, No.7
“Effects of Negative Bias Operation and Optical Stress on Dark Current in CMOS Image Sensors”

◯2009.11. Trans. ED Vol.56, No.11
“A High-Speed Low-Noise CMOS Image Sensor With 13-b Column-Parallel Single-Ended Cyclic ADCs”

◯2009.02. ISSCC
“A 0.1e- Vertical FPN 4.7e- Read Noise 71dB DR CMOS Image Sensor with 13b Column-Parallel Single-Ended Cyclic ADCs”

◯2008.02. ISSCC
“A CMOS Image Sensor Integrating Column-Parallel Cyclic ADCs with On-Chip Digital Error Correction Circuits”

 ISSCC: International Solid-State Circuits Conference
 IISW: International Image Sensor Workshop
 Trans. ED: IEEE Transactions on Electron Devices
 Journal. SSC: IEEE Journal of Solid-State Circuits

ここで紹介する技術は、当社設立のきっかけとなった、 第Ⅰ期知的クラスター創成事業(2002年~2006年)成果の一部です。

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